Dr. Pragati Singh

Dr. Pragati Singh

Assistant Professor (Gr-II)

B.Tech, M.Tech, Ph.D

Contact & Basic Information

Phone: 08119966847

Email: [email protected]

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Department: Electronics And Communication Engineering

Address:

Educations

Course Institute Board / University Year Subject
B.E. / B.Tech. 2009Electronic and Communication Engineering
M.E. / M.Tech. 2013Microelectronics and VLSI Design
Ph.D. 2022Device Modeling and Simulation

Experiences

Position Year Organisation Specialisation
Assistant Professor 31/01/2014 To Date National Institute of Technology MizoramTeaching & Research

Research Interest

Semiconductor Devices, Device Modeling and Simulation, Capacitorless Memory Design, Capcitorless1T-DRAM, VLSI, System Level Design, FPGA, SoC, Digital Electronic and Electronic Circuits

Publications

International/National Journals
S.No. Month Year Publication Information
1 DEC 2021 Pragati Singh, Rudra Sankar Dhar, Srimanta Baishya., “Micro-features of ambipolar snapback behaviour under high current injection to design capacitorless memory device”, IoP science, Physica Scripta,vol;. 4. number 12, pp. 124069. Doi: https://doi.org/10.1088/1402-4896/ac3b69
2 APR 2021 Singh, P., Dhar, R.S. & Baishya, S. Physics & Modeling of Ambipolar Snapback Behavior in Gate Grounded NMOS. Silicon (2021). https://doi.org/10.1007/s12633-021-01086-4
3 JUN 2020 Pragati Singh, R. S. Dhar, S. Baishya and A. Chatterjee “Bipolar effects in snapback mechanism in advanced n-FET transistors under high current stress conditions” 4 June 2020, IoP science,Journal of Physics Communications, vol. 4 no. 6 (065009).
4 MAY 2020 Rajiv Ranjan Thakur, Pragati Singh, Chaitali Koley. Design of Folded Cascode Amplifier for SCL 180 nm Technology Node for Low Power Applications. Journal of Network Security. 2020; 8(1): 22 – 31p. (Web of Science)
5 FEB 2019 Rajiv Ranjan Thakur, Pragati Singh, “Performance reliability of ultra-thin Si-SiO2, Si-Al2O3, Si-ZrO2 and Si-HfO2 interface in rectangular steep retrograded nano-regimes devices,” Microelectronics Reliability, Volume 96, 2019, Pages 21-28, ISSN 0026-2714, https://doi.org/10.1016/j.microrel.2019.02.003.
6 JAN 2019 Rajiv Ranjan Thakur and Pragati Singh “Q-FinFET: The Next Generation FinFET”, Journal of Nanoelectronics and Optoelectronics 14, 92–98 (2019).
7 JUN 2018 S. Das, P. Singh, and C. Koley, “Hardware implementation of adaptive feedback based reversible image watermarking for image processing application,” Microsystem Technologies, vol. 3456789, 2018. [Online]. Available: https://doi.org/10.1007/s00542-018-4024-x
8 APR 2018 Rajiv Ranjan Thakur and Pragati Singh “A Comparative analysis of steep retrograde and uniform doping for high-k dielectrics based multi-gate devices,” Carbon – Science and Technology, vol. 10, issue. 4 pp 87-94, 2018.
9 JUL 2014 Remika Ngangbam ,Pragati Singh ,F. Lalrinfeli,”Analysis of Dynamic Channel Allocation based on Blocking Probability for Cellular Network” International Journal of Engineering Science and Innovative Technology, pp. 151-157, july 2014
10 OCT 2013 Sweta Chander, Pragati Singh, S Baishya, “Optimization of Direct Tunneling Gate Leakage Current in Ultrathin Gate Oxide FET with High-K Dielectrics” International Journal of Recent Development in Engineering and Technology, pp. 24-30, Oct 2013
International/National Conference Proceedings
S.No. Month Year Publication Information
1 JUN 2021 Singh, Pragati, Rudra Sankar Dhar and Srimanta Baishya. “Features of Snapback in Compact Memory Devices For High Performance Integrated Circuits.” 2021 Devices for Integrated Circuit (DevIC) (2021): 397-400.
2 MAY 2021 Pragati Singh, Rudra Sankar Dhar, Niladri Pratap Maity and Srimanta Baishya, “Comparison of Snapback Phenomenonand Physics in Bottom and Top Body Contact NMOS”, 8th International Conference on Microelectronics, Circuits & Systems (Micro2021, 8th and 9th of May, 2021, Kolkata, West Bengal,India.
3 DEC 2019 Pragati Singh, Srimanta Baishya and Amitabh Chatterjee, “High current injection based microscopic of snapback in nano regime gate length ZRAM,” IWPSD’19, 17-20 Dec. 2019, Kolkata.
4 MAY 2018 R. R. Thakur, P. Singh and S. Swaraj, “Study of Suppressed Carrier Scattering Effects and Carrier Quantization in Tri-Gate FinFET for SoC Applications,” 2018 3rd IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT), 2018, pp. 2254-2257, doi: 10.1109/RTEICT42901.2018.9012475.
5 MAY 2018 R. R. Thakur, P. Singh, S. S. Kiran and A. K. Singh, “Study of Quantization and Carrier Scattering Effects in SOI Tri-Gate FinFET for SoC Applications,” 2018 2nd International Conference on Trends in Electronics and Informatics (ICOEI), 2018, pp. 1470-1473, doi: 10.1109/ICOEI.2018.8553770.
6 MAR 2018 R. R. Thakur and P. Singh, “Effects of Interface Charge (Qit) and Interface Trap Density (Dit) on A12O3, ZrO2 and HfO2 based Nano Regime Multi-Gate Devices,” 2018 4th International Conference on Devices, Circuits and Systems (ICDCS), 2018, pp. 58-62, doi: 10.1109/ICDCSyst.2018.8605166.
7 MAR 2018 R. R. Thakur and P. Singh, “Effects of Interface Charge (Qit) and Interface Trap Density (Dit) on A12O3, ZrO2 and HfO2 based Nano Regime Multi-Gate Devices,” 2018 4th International Conference on Devices, Circuits and Systems (ICDCS), 2018, pp. 58-62, doi: 10.1109/ICDCSyst.2018.8605166.
8 JAN 2018 Rajiv Ranjan Thakur and Pragati Singh “Analysis of the Interface Trap Properties in Ultra-thin Al2O3 and HfO2 based Double Gate FinFETs” Proceedings of the International Conference on Electrical, Electronics, Computers, Communication, Mechanical and Computing (EECCMC) 28th & 29th January 2018.
9 MAY 2015 • Ram Kumar, Pragati Singh, Ch Anandini and F.A Talukdar “Linearity analysis and optimization of 5.5 GHz Inductive Source Degeneration Low Noise Amplifier” accepted in 1st International Conference on Nano-electronics, Circuits & Communication Systems (Springer proceeding) 2015.
10 MAY 2015 • Ram Kumar, Pragati Singh, Abahan Sarkar and F.A Talukdar “Linearity Optimization of 5.5 GHz Inductive Source Degeneration LNA using PSO” accepted in 1st International Conference on Nano-electronics, Circuits & Communication Systems (Springer proceeding) 2015.
11 APR 2015 • Ram Kumar, Abahan Sarkar, Pragati Singh , Fazal Talukdar and Amulya Pandey “Integrated Edge Region based Geometric Active Contour using Texture Information” 1st. International Conference on Computing,. Communication, Electrical, Electronics, Devices and Signal. Processing pp 202-206, April 2015.
Book Chapters
S.No. Month Year Publication Information
1 JUN 2023 Singh, P., Maity, N.P., Dhar, R.S., Baishya, S. (2023). Comparison of Snapback Phenomenon and Physics in Bottom and Top Body Contact NMOS. In: Biswas, A., Islam, A., Chaujar, R., Jaksic, O. (eds) Microelectronics, Circuits and Systems. Lecture Notes in Electrical Engineering, vol 976. Springer, Singapore. https://doi.org/10.1007/978-981-99-0412-9_3
2 MAR 2020 Rajiv Ranjan Thakur, Pragati Singh, Investigations of Interface Trap Densities (Dit) and Interface Charges (Qit) for Steep Retrograded Al2O3 and HfO2 based Nano Regime GAA FinFETs, Materials Today: Proceedings, Volume 24, Part 3, 2020, Pages 2011-2018, ISSN 2214-7853, https://doi.org/10.1016/j.matpr.2020.03.630.
3 MAR 2020 Rajiv Ranjan Thakur, Pragati Singh, Investigations of Interface Trap Densities (Dit) and Interface Charges (Qit) for Steep Retrograded Al2O3 and HfO2 based Nano Regime GAA FinFETs, Materials Today: Proceedings, Volume 24, Part 3, 2020, Pages 2011-2018, ISSN 2214-7853, https://doi.org/10.1016/j.matpr.2020.03.630.
4 MAR 2020 Rajiv Ranjan Thakur, Pragati Singh, Study of Carrier Scattering and Quantization Effects in Steep Retrograded Double Gate FinFETs for Nano Technology Applications, Materials Today: Proceedings, Volume 24, Part 3, 2020, Pages 2019-2023, ISSN 2214-7853, https://doi.org/10.1016/j.matpr.2020.03.631.
5 AUG 2018 Rajiv Ranjan Thakur and Pragati Singh “Analysis of Interface Trap Charges and Densities using Capacitance-Voltage (C-V) and Conductance Voltage(G-V) Methods in Steep Retrograded Al2O3, ZrO2 and HfO2 based Gate All Around FinFETs,” AIP Conference Proceedings 2009, 020053 (2018); https://doi.org/10.1063/1.5052122

Courses Taught

UG: 1. Introduction to VLSI Design 2. Low Power VLSI Design 3. CMOS Design 4. Advance Electronic Circuits 5. Digital Signal Processing 6. Linear lntegrated Circuits 7. Semicondcutor Devices 8. Solid State Devices 9. Analog Circuits 10. Basic Electronics

PG: 1. Semicondcutor Modeling 2. MoS Transistor Modeling 3. Digital VLSI Circuits 4. Low Power VLSI Design 5. VLSI Physical Design 6. VLSI CAD 7. VLSI Technology

Awards / Recognitions

S.No. Month Year Category Achievement Information
1 JAN 2020 Sponsored by the International Research Council International Research leadership Award by World Research Council and International Research Council

Additional Assignments

B.Tech Projects & M.Tech Dissertation

B.Tech. Projects
S.No. Degree Project Topic, Student Name & Other Details Status From To
1 B.E. / B.Tech.
Design of Digital Circuits using Reversible Logic
1. Ajeet Kumar 2. Boda Vinod Kumar 3. Rajesh Rangdal 4. Ritesh Kumar Singh
Completed 31/01/2014 09/06/2014
2 B.E. / B.Tech.
Modeling and Analysis of Reduced GateTunneling Leakage Current in UltraThin Gate Oxide using High-K Dielectrics
1. Amulya Pandey 2. Nikita Saikia
Completed 01/08/2014 15/06/2015
3 B.E. / B.Tech.
Design and Perfoamnce Aanalysis of Junctionless Transistors
1. Yash Panday 2. Surendra Kumar 3. Pradeep Kumar
Completed 01/12/2014 15/06/2015
4 B.E. / B.Tech.
Design of Double Gate Junctionless Transistor using Sentaurus TCAD
1. Kumari Daleswari 2. Nikhil Rao
Completed 01/08/2015 01/06/2016
5 B.E. / B.Tech.
Simulation and Characteristics Study of 3D FinFET
1. Ritesh Kumar 2. Pnitu Nayak
Completed 01/08/2015 01/06/2016
6 B.E. / B.Tech.
MATLAB Implementation of Reversible Image Watermarking
1. Divya Sharma 2. Gouru Vishnu vardhan Reddy
Completed 01/08/2016 14/06/2017
7 B.E. / B.Tech.
Air Quality Monitoring System
1. Kabita Das 2. Ajay Kumar
Completed 01/08/2016 14/06/2017
8 B.E. / B.Tech.
Digital Reversible Watermarking
1. Jisha Joshy 2. Manish Kumar Tiwari
Completed 01/08/2017 06/06/2018
9 B.E. / B.Tech.
Implementation fo Air Quality Monitoring System using FPGA
1. Abhishek Kumar Singh 2. Raju Kumar
Completed 01/08/2017 06/06/2018
10 B.E. / B.Tech.
VHDL Implementation of Orthogonal Frequency Divsion Miltiplexing (OFDM) Transmitter)
Kukade Suyog Girdharrao
Completed 01/08/2018 01/06/2019
11 B.E. / B.Tech.
Design Of Low Noise Amplifier
1. Aryan Malik 2. Pritish Thapa
Completed 01/08/2020 01/06/2021
12 B.E. / B.Tech.
MONITORING AND DETECTION OF EYE BLINKING IN VIEW OF ACCIDENT PREVENTION DUE TO DROWSINESS USING AURDUINO
1. Kartikey Singh 2. Piyush Raj
Completed 01/08/2020 01/06/2021
13 B.E. / B.Tech.
Design & Performance analysis of TFET based inverter
1. Blinty S 2. Uthsyab Mukhar Mandal 3. Sudhir Kumar Sharma
Completed 01/08/2021 14/05/2022
14 B.E. / B.Tech.
Temperature Effect on Dual Material Dual Gate (DMDG) TFET
1. Kunal Sheengada 2. G. Koushik Prasan Sai
Completed 01/08/2021 14/05/2022
15 B.E. / B.Tech.
Design of Double Gate Junctionless Transistor for Capacitorless Memory
1. Akurathi Praveen Siva Krishna 2. Gaurav Kashyap
Completed 01/08/2021 13/05/2022
16 B.E. / B.Tech.
Futuristic approach to design compact memory device
1. Kaustubh Mani, 2. Mayank Mishra, 3. Banoth Sairam
Completed 01/06/2022 15/05/2023
17 B.E. / B.Tech.
DESIGN OF COMPACT MEMORY DEVICE USING BIPOLAR-I-MOS
1. Telagathoti Gifty Abhishek 2. Shanti Bijoy Tongchangya
Completed 01/06/2022 15/05/2023
18 B.E. / B.Tech.
OPTIMIZATION OF OPERATIONAL WINDOW IN BIPOLAR I-MOS FOR CAPACITOR-LESS MEMORY DESIGN
1. JENNY LALRUATFELI 2.SANSKAR SHARMA
Completed 01/08/2023 15/05/2024
19 B.E. / B.Tech.
DESIGN OF MAC CNN ACCELERATOR USING SIGMOID AND ReLU ACTIVATION FUNCTIONS
1. Prity Malik 2. Nishant Nitin Mishra
Completed 01/08/2023 15/05/2024
20 B.E. / B.Tech.
FloatCore: IEEE 754-2019 FPU for RISC-V Processor
Arya Sinha
Ongoing 01/08/2024 21/05/2025
21 B.E. / B.Tech.
Developing GUI using QT Creator
M. Sujay Singh
Ongoing 01/08/2024 21/05/2025
22 B.E. / B.Tech.
The SUBTERRANEAN 2.0 CIPHER Suite
1. Gunju Kumari 2. L. Shiva Kiran Reddy 3. Yuvraj Singh
Ongoing 01/08/2024 21/05/2025
M.Tech. Dissertations
S.No. Degree Project Topic, Student Name & Other Details Status From To
1 M.E. / M.Tech.
Study of Vertical Superthin Body FinFET
Rajiv Ranjan Thakur
Completed 01/03/2017 05/06/2018
2 M.E. / M.Tech.
Optimization of Two Stage Amplifier using Swarm Base Technique
Sarilla Surya Kiran
Completed 01/03/2017 12/11/2018
3 M.E. / M.Tech.
Design and Analysis of TCCT and SOI FED as Envisaged Memory Device
Shakha Chaturvedi
Completed 01/03/2021 11/05/2022
4 M.E. / M.Tech.
Design & Analysis of Zero Capacitor 1T-DRAM using Bipolar I-MOS
Sarvesh Kumar Prajapati
Completed 01/02/2022 11/05/2023
5 M.E. / M.Tech.
Design of compact memory using double gate junction less transistor for optimized sense margin window
Ajmera Maneesh
completed 01/02/2022 11/05/2023
6 M.E. / M.Tech.
Hybrid-Kickstart-Electric Start Mechanism for Motorcycles
Zosiamliana Zote
Ongoing 01/08/2024 23/05/2025

Research Scholars/Ph.D. Supervised

S.No. Degree Research Topic, Scholar Name & Other Details Status Supervisor Category From To
1 Ph.D.
Device Modeling and Simulations
Bandi Vaisalini
Ongoing Sole Supervisor 12/12/2024 31/12/2025

Post-Doctoral Fellows

Academic Responsibility

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Sponsored Research Project

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Memberships

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Invited Reviewer

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Training / Conference Attended

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Training / Conference Conducted

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